How SSD Wear Leveling Works

Wear leveling is the controller's strategy for distributing write operations evenly across all NAND blocks in an SSD. Every NAND block has a limited number of program/erase (P/E) cycles before its cells can no longer reliably store data. Without wear leveling, the blocks hosting frequently modified data (operating system swap files, database journals, temp files) would wear out while blocks holding static data (installed programs, archived documents) remain nearly unused. Wear leveling prevents this uneven aging.

Static vs Dynamic Wear Leveling

Dynamic wear leveling is simpler to implement but less effective. If a drive has 100 blocks and 50 are occupied by static data that never changes, dynamic wear leveling only distributes writes among the other 50 blocks. Those 50 blocks wear at twice the rate they would if all 100 were participating.

Static wear leveling solves this by moving cold data. If block 1 has been erased 500 times and block 50 has been erased 10 times because it holds an old archive, the controller will move the archive from block 50 to block 1 and redirect new writes to block 50. The archive data is untouched by this relocation; it is simply copied from one physical block to another.

Write Amplification and Its Effect on Endurance

NAND flash has an asymmetry: writes happen at the page level (4-16 KB), but erases happen at the block level (256-512 pages per block, or 1-4 MB). To write new data to a page within a block that already contains data, the controller must:

1. Read all valid pages from the target block into a buffer
2. Erase the entire block (setting all cells to 1)
3. Write back the valid pages plus the new data to a fresh block

This means a single 4 KB host write can trigger a 1 MB block rewrite internally. The ratio of actual NAND writes to host writes is the write amplification factor (WAF). A WAF of 1.0 is ideal (every byte written by the host results in exactly one byte written to NAND). In practice, WAF ranges from 1.1 for sequential workloads with TRIM enabled to 10+ for worst-case random write patterns on a full drive.

Write amplification directly affects endurance. A drive with a WAF of 3.0 consumes P/E cycles three times faster than the host's write volume would suggest. TRIM reduces WAF by informing the controller which pages are invalid, allowing the garbage collector to erase blocks without copying stale data.

How the Controller Tracks Block Wear Counts

The controller maintains a table mapping each physical block to its current P/E cycle count. This table is stored in the SSD's internal metadata area (part of the Flash Translation Layer data structures) and updated every time a block is erased.

The controller uses this table for wear leveling decisions. The algorithm varies by manufacturer: some use simple minimum-P/E-count selection, others use threshold-based triggers that initiate static wear leveling only when the difference between the most-worn and least-worn blocks exceeds a configurable delta.

If the controller's FTL crashes or the metadata area corrupts (common during power loss), the wear count table may be lost. In this scenario, the controller may fall back to conservative defaults or fail to initialize. Recovery tools like PC-3000 SSD can access the raw NAND data and rebuild FTL structures, but the granular wear count data may not be recoverable.

What Happens When NAND Cells Wear Out

As a block approaches its endurance limit, several measurable changes occur:

• Bit error rate increases. The ECC engine corrects more errors per page. The raw bit error rate (RBER) rises from manageable levels toward the uncorrectable bit error rate (UBER) threshold.
• Program/erase time increases. Worn cells require higher voltages and longer pulse durations to program and erase, slowing down write operations.
• Data retention decreases. Worn cells leak charge faster, reducing the time data can be stored without power. A new TLC cell may retain data for years; a cell near end-of-life may retain data for weeks.

When a block's error rate exceeds the ECC correction capability, the controller retires the block and allocates a spare from the over-provisioned pool. SMART attributes track the number of retired blocks. When the spare pool is exhausted, the drive enters a read-only mode (on well-designed controllers) or fails entirely.

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