Hard Drive Not Spinning?
Your Data May Still Be Recoverable.

FLIR Thermal Imaging for Shorted Components

When a board pulls excessive current at power-on but the failure point is not obvious under magnification, a FLIR thermal camera localizes the short. The failed component heats faster than its neighbors within seconds of applying power on a current-limited bench supply. We feed the PCB about 200 to 400 mA through the limiter and watch the FLIR feed: the hot spot is the short. This routinely identifies a failed motor driver IC, a shorted tantalum capacitor on the 5V or 12V rail, or a shorted TVS diode dissipating heat into the ground plane. Without thermal localization, board-level diagnosis on densely populated PCBs becomes guesswork.

TVS Diode Testing

TVS (Transient Voltage Suppressor) diodes protect the drive from overvoltage. When a power surge hits, the TVS diode shorts to ground, cutting power to the entire board. This is by design: the diode sacrifices itself to save the platters. We test for a short across the 12V and 5V TVS diodes using a multimeter in diode mode. A reading near zero ohms confirms a shorted diode. In many cases, removing the shorted TVS diode restores motor power, though the drive then runs without surge protection.

Motor Driver IC

The motor driver IC (also called the spindle motor controller or smooth chip) converts DC power into the three-phase AC signal that spins the platters. Common motor driver ICs include the SMOOTH L7251 on Western Digital boards and various proprietary motor controllers on Seagate PCBs. If this chip fails, the motor receives no phase signal and the platters do not move. We test output pins with an oscilloscope to confirm no phase output, then determine whether the chip itself is dead or whether an upstream power rail is missing.

Capacitor and Voltage Rail Analysis

Hard drive PCBs operate on multiple voltage rails. On 3.5-inch desktop and enterprise drives, 12V powers the spindle motor and 5V powers the preamp and heads; 2.5-inch laptop drives run the spindle and logic from the 5V rail only, with no 12V input. 3.3V, where present, powers the controller MCU and firmware ROM. A failed capacitor or voltage regulator on any rail can prevent spin-up. We measure each rail at the connector and at key test points on the board. Tantalum capacitors are a common failure point; they can short internally, pulling an entire rail to ground.

Shorted Motor Driver IC

When the motor driver has failed short, the 12V rail collapses within milliseconds of power-on. The intelligent PSU records an extreme inrush that trips the overcurrent cutoff; on the scope, the three motor output pins show a DC-stuck flatline or asymmetric distortion instead of commutation. The correct response is PCB-level work: replace the motor controller at the component level, or transplant the ROM chip onto a donor board of the same revision using Atten 862 hot air rework at 280 to 320 degrees C.

Seized FDB Motor vs. Stiction

Mechanical blockage, whether it is a seized fluid dynamic bearing or a head stack adhered to the platter, produces the same electrical signature: the controller attempts to kickstart the rotor, fails to detect rotation via back-EMF, and retries several times before aborting. On the current trace this shows as a repeating spin buzz of short high-current spikes separated by idle periods; after the abort, the MCU cuts the preamp negative supply rail. The acoustic signature is the fastest way to separate the two: a faint hum or low beep points to an FDB seizure; a ticking or rhythmic beep points to stiction in the head stack. Seized motors require a platter transplant to a donor chassis; stiction requires opening the drive on the 0.02 micrometer ULPA clean bench and freeing the heads back onto the ramp.

Mechanically Free, Firmware Inhibited

A fourth pattern shows stable 12V and 5V rails at normal idle current with no kickstart attempt at all. The motor is not blocked; the firmware has decided not to spin. Common causes include Power-Up in Standby lock on Toshiba MQ and DT drives, the head-resistance pre-check on Western Digital Shingled Magnetic Recording drives aborting the spin sequence after detecting a degraded head, and a Seagate F3 family BSY state that halts initialization before it reaches the spindle. These are PC-3000 terminal jobs: issue the vendor-specific ATA wake or clear the PUIS flag, regenerate the translator, or repair the Service Area module that is blocking initialization. For a broader walkthrough of the imager and what each PC-3000 module is doing at the firmware level, see what PC-3000 actually does.

Preamp Revision and Head Family

The preamplifier IC sits on the flex cable inside the Head Disk Assembly and amplifies microvolt-level signals from the tunneling magnetoresistive read element. A donor preamp from a different revision cannot communicate correctly with the patient drive's read channel, even if the heads themselves are mechanically compatible. The head family has to match as well: each family has a specific fly-height, magnetic moment, and read-write gap geometry that the firmware was calibrated against. Ideally the donor is drawn from the same manufacturing site and a date code within roughly three months of the patient.

Micro-Jog and Servo Tracking Tolerance

Micro-jog is the adaptive offset between the physical read element and write element on a single head, stored on Western Digital drives as Module 47 inside the ROM and EEPROM. Because photolithography tolerances make every head slightly different, the drive uses this offset to center the read element over the track while the servo is locked on a write-aligned reference. The delta between the patient's micro-jog values and the donor's values should stay under 100 and must not exceed 300; beyond 300, the servo cannot lock onto the track and the drive clicks, spins down, or throws sector errors at the top of the LBA range.

When no exact match is available, PC-3000's WD ROM editor lets us calculate an averaged Module 47, splitting the difference between patient and donor values so the read channel can at least initialize. Averaging is a last-resort technique; throughput drops and some heads remain unreadable, but it is often enough to image the Service Area, pull the translator, and extract user data off the surviving heads at reduced speed.

Firmware SA Module Compatibility

The donor heads also need to be capable of reading the patient's Service Area microcode. On Seagate F3 drives this is checked through terminal-level access to the SA module map; on older Western Digital ROYL-generation drives the Service Area modules 102 through 107 need to be compatible with the donor's ROM image, while on newer WD platforms (roughly PCB revision 1640 and later) those SA module slots are left empty and ROM regeneration follows a different path. If the SA firmware version on the patient and donor diverge, the translator built during factory calibration will not resolve logical sectors correctly, and the drive will present as a 0 GB or wrong-capacity device even though the spindle is healthy. Tier and donor cost disclosures live in the pricing section above; donor parts are consumed in the repair and are quoted separately from the labor tier.

PRML and Viterbi Detection in Modern Read Channels

Partial Response Maximum Likelihood detection, with its Extended PRML variants, shapes the analog waveform into a known response target and then hands it to a Viterbi decoder. The Viterbi algorithm evaluates a sequence of samples and picks the most probable bit path given the noise model the firmware was calibrated against. If the transplanted head delivers a lower-amplitude or spectrally shifted signal, the default decision thresholds classify valid bits as noise and sectors start returning uncorrectable errors.

Loosening Viterbi Thresholds through Terminal Access

PC-3000 Portable III and the DeepSpar Disk Imager both bypass the host operating system and talk to the drive through vendor-specific terminal commands; on Seagate F3 drives this is the ASCII terminal, on WD drives it is the vendor-specific vendor-unique command set. From that terminal we can loosen the Viterbi decision boundaries so the decoder accepts lower-amplitude samples as valid data. Raw bit error rate climbs when we do this, but the drive's LDPC error correction absorbs the extra errors, and sectors that were unreadable at factory thresholds come back clean.

FIR Coefficient Equalization and Adaptation Rate

Between the analog front end and the Viterbi detector sits a Finite Impulse Response filter, typically a 5-tap to 32-tap configuration depending on the channel generation. Its job is to shape the incoming waveform into the PRML target the Viterbi decoder expects. When a donor head changes the signal spectrum, the stock FIR taps no longer equalize it correctly. Through PC-3000 terminal access and vendor-specific commands we retune the FIR coefficients to match the donor's actual response, then freeze the channel's automatic adaptation so it cannot chase a degrading signal and permanently lock out data. We pair this with the DeepSpar Disk Imager for per-head read timeouts and deferred retry strategies so a marginal head never stalls a multi-head image: PC-3000 retunes the read channel at the firmware level, and DeepSpar manages the retry and head-map scheduling at the imaging level.